fied. The resistive switching time variation versus gate resistance (Figure 9) shows how typical switching performance is affected by the parasitic circuit elements. If the parasitics were not present, the slope of the curves would maintain a value of unity regardless of the switching speed. The circuit used to obtain the data is constructed to minimize common inductance in the drain and gate circuit loops and is believed readily achievable with board mounted components. Most power electronic lo.
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
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Advance Information
Medium Power Surface Mount Products
MMDF7N02Z
Motorola Preferred Device
TMOS Dual N-Channel with Monolithic Zener ESD Protected Gate
EZFETs™ are an advanced series of power MOSFETs which utilize Motorola’s High Cell Density TMOS process and contain monolithic back–to–back zener diodes. These zener diodes provide protection against ESD and unexpected transients. These miniature surface mount MOSFETs feature ultra low RDS(on) and true logic level performance. They are capable of withstanding high energy in the avalanche and commutation modes and the drain–to–source diode has a very low reverse recovery time.
MMDF7N02Z Datasheet
