Motorola MPC9608
The MPC9608 is a 3.3 V compatible, 1:10 PLL based zero-delay buffer. With a very wide frequency range and low output skews the MPC9608 is targeted for high performance and mid-range clock tree designs. This enables nested clock designs with near-zero insertion delay.| Part No. | MPC9608 |
|---|---|
| Datasheet | MPC9608 Download |
| Manufacturer |  Motorola |
| Description | 1:10 LVCMOS Zero Delay Clock Buffer |
| Buy | Stock & Price |
FEATURES
MPC9608● 1:10 outputs LVCMOS zero-delay buffer Freescale Semiconductor, Inc...
●
●
●
●
●
●
●
●
●
●
● Single 3.3 V supply Supports a clock I/O frequency range of 12.5 to 200 MHz Selectable divide-by-two for one output bank Synchronous output enable control (CLK_STOP) Output tristate control (output high impedance) PLL bypass mode for low frequency system test purpose Supports networking, telecommunications and computer applications Supports a variety of microprocessors and controllers Compatible to PowerQuicc I and II Ambient Temperature Range -40°C to +85°C 32-lead Pb-free package available LOW VOLTAGE 3.3 V LVCMOS 1:10 ZERO-DELAY CLOCK BUFFER FA SUFFIX 32-LEAD LQFP PACKAGE CASE 873A Functional
DESCRIPTION
The MPC9608 uses an internal PLL and an external feedback path to lock its low-skew clock output phase to the reference clock phase, providing virtually zero propagation delay. Designs using the MPC9608 as PLL fanout buffer will show significantly lower clock skew than clock distributions developed from traditional fanout buffers.
