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MTB1306 - TMOS POWER FET

Key Features

  • 000 0.
  • 10 VDS = 0 V Ciss VGS = 0 V Crss Ciss Coss Crss.
  • 5.0 VGS 0 VDS 5.0 10 15 20 25 VGS OR VDS, GATE.
  • TO.
  • SOURCE OR DRAIN.
  • TO.
  • SOURCE.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MTB1306/D Advance Information HDTMOS E-FET.™ High Density Power FET D2PAK for Surface Mount N–Channel Enhancement–Mode Silicon Gate The D2PAK package has the capability of housing a larger die than any existing surface mount package which allows it to be used in applications that require the use of surface mount components with higher power and lower RDS(on) capabilities. This advanced high–cell density HDTMOS power FET is designed to withstand high energy in the avalanche and commutation modes. This new energy efficient design also offers a drain–to–source diode with fast recovery time.