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MTP1302 - TMOS POWER FET

Key Features

  • 18 15 12 1000 VDD = 15 V ID = 20 A VGS = 10 V TJ = 25°C tf tr td(off) td(on) 100 t, TIME (ns) 10 1.0 1.0 0 0 2.0 4.0 6.0 8.0 10 12 14 16 18 20 22 24 26 28 30 QG, TOTAL GATE CHARGE (nC) 10 RG, GATE.

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MTP1302/D Advance Information HDTMOS E-FET™ High Density Power FET N–Channel Enhancement–Mode Silicon Gate This advanced high cell density HDTMOS power FET is designed to withstand high energy in the avalanche and commutation modes. This new energy efficient design also offers a drain–to–source diode with a fast recovery time. Designed for low voltage, high speed switching applications in power supplies, converters and PWM motor controls, these devices are particularly well suited for bridge circuits where diode speed and commutating safe operating area are critical and offer additional safety margin against unexpected voltage transients.