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MUN5311DW1T1 - Dual Bias Resistor Transistors

Key Features

  • VO = 0.2 V TA =.
  • 25°C 10 25°C 75°C 1 0.1 0 10 20 30 40 IC,.

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Full PDF Text Transcription for MUN5311DW1T1 (Reference)

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MUN5311DW1T1/D Dual Bias Resistor Transistors NPN and PNP Silicon Surface Mount Transistors with Monolithic B...

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istors NPN and PNP Silicon Surface Mount Transistors with Monolithic Bias Resistor Network The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base–emitter resistor. These digital transistors are designed to replace a single device and its external resistor bias network. The BRT eliminates these individual components by integrating them into a single device. In the MUN5311DW1T1 series, two complementary BRT devices are housed in the SOT–363 package which is ideal for low power surface mount applications where board space is

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