SN74LS113A Description
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS113A offers individual J, K, set, and clock inputs. These monolithic dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may be allowed to change when the clock pulse is HIGH and the bistable will perform according to the truth table as long as minimum setup...
SN74LS113A Key Features
- hLH Hh
- qq H, h = HIGH Voltage Level L, I = LOW Voltage Level X = Don’t Care l, h (q) = Lower case letters indicate t