UPD16602 Datasheet | NEC

DATA SHEET MOS INTEGRATED CIRCUIT µPD16602 312-OUTPUT TFT-LCD FULL COLOR DRIVER The µPD16602 is a TFT-LCD source driver with full color display capability. It is ideal for 1024 × 768 pixel (XGA) class high definition displays. The internal circuit consists of 12 channels (4 × 3) of analog input pins, 12 channels of 16-bit shift registers and 312 channels of sample & hold circuits (2 latch type). Analog display signals are sampled in 12 channels simultaneously by the sample & hold circuits and they are output in the next line. The output voltage of the sample & hold circuits is as great as 10.5 VP-P and maintains high accuracy with an output deviation of ±20 m VMAX. Inputting analog display signals that been γ -processed in the previous stage signal processing circuit allows realization of a high definition 256-gray-scale-equivalent full color display without requiring line inversion. Features - 4 × 3 (RGB)-channel analog input allows display signal input wiring to be reduced. - High dynamic range (10.0 VP-PMIN. VDD2 = 11.0 V) - High accuracy sample & hold circuits (output deviation; ±20 m VMAX., ±5.0 m VTYP.) - High-speed sampling frequency (for both analog and digital; fmax. = 20 MHz MIN.) - Low power control (reduction of output buffer bias current) function on chip (operating power consumption; 82 m WTYP., VDD2 = 12.5 V) - Bi-directional data store function on chip - Corresponding to high-density mounting (slim TCP) ORDERING INFORMATION Part Number µPD16602N- × × × Package Document No. S10671EJ1V0DS00 (1st edition) Date Published August 1998 N CP(K) Printed in Japan © 1. BLOCK DIAGRAM R/L CLK SPR S/D Bi-directional shift register (26 circuits) DR0 to DR3 DG0 to DG3 DB0 to DB3 Level shifter (26 circuits) 4 4 4 PL/NL HS BIAS1 BIAS2 Sample & hold + output buffer...