UPD16633B Datasheet | NEC

DATA SHEET MOS INTEGRATED CIRCUIT µPD16633B 312 OUTPUT TFT-LCD SORCE DRIVER (PATIBLE WITH 64 GRAY SCALES) The µPD16633B is a source driver for TFT-LCDs capable of dealing with displays with 64 gray scales. Data input is based on digital input configured as 6 bits by 6 dots (2 pixels), which can realize a full-color display of 260,000 colors by output of 64 values γ-corrected by an internal D/A converter and 5-by-2 external power modules. Because the output dynamic range is as large as 9.8 VP-P, level inversion operation of the LCD’s mon electrode is rendered unnecessary. Also, to be able to deal with dot-line inversion when mounted on a single side, this source driver is equipped with a built-in 6-bit D/A converter circuit whose odd output pins and even output pins respectively output gray scale voltages of differing polarity. Assuring a maximum clock frequency of 45 MHz when driving at 3.0 V, this driver is applicable to XGA-standard TFT-LCD panels. Features - Capable of outputting 64 values by means of 5-by-2 external power modules (10 units) and a D/A converter - Output dynamic range 9.8 VP-P min. (@VDD2 = 10.0 V) - CMOS level input - Input of 6 bits (gradation data) by 6 dots - High-speed data transfer: fmax. = 45 MHz (internal data transfer speed when operating at 3.0 V) - 312 outputs - Apply for only dot inversion - Display data inversion function (POL2 terminal.) - Single bank arrangement is possible (loaded with slim TCP) ORDERING INFORMATION Part Number Package TCP (TAB package) µPD16633BN-××× The TCP’s external shape is customized. To order your TCP’s external shape, please contact a NEC salesperson. Document No. S13214EJ2V0DS00 (2nd edition) Date Published July 1998 N CP(K) Printed in Japan © µPD16633B 1. BLOCK DIAGRAM STHR R/L CLK STB STHL VDD1 VSS1 C51 C52 50-bit bidirectional shift register C1 C2 D00-05 D10-15 D20-25 D30-35 D40-45 D50-55 POL2 Data register Latch VDD2 Level shifter...