UPD17010
Overview
- 17K architecture: General-purpose register system
- A variety of peripheral hardware General-purpose I/O ports, LCD controller/driver, serial interface, 12-bit timer, A/D converter, D/A converter (PWM output), clock generator port, frequency counter
- Program memory (ROM) 16K bytes (7932 × 16 bits)
- General-purpose data memory (RAM) 432 × 4 bits
- Many interrupts External: 1 Internal: 4 External/internal (multiplexed): 1
- Instruction execution time
- 44 µ s (with 4.5-MHz crystal resonator)
- Decimal operation
- Hardware for PLL frequency synthesizer Dual modulus prescaler (150 MHz MAX.), programmable divider, phase comparator, charge pump
- Power-ON reset, reset by CE pin, and power failure detection circuit
