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UPD4104 - 4096 x 1 STATIC NMOS RAM

Key Features

  • ' . FastAccessTime-200ns (J. LPD4104-2).
  • Very Low Stand-By Power - 28 mW Max.
  • Low VCC Data Retention Mode to +3 Volts.
  • Single +5V ±10% Supply.
  • Fully TTL Compatible.
  • Available in 18 Pin Plastic and Ceramic Dual-in-Line Packages.
  • '3 Performance Ranges: II jlPD4104 jlPD4104-1 jlPD4104-2 ACCESS TIME 300 ns 250 ns 200 ns.

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Other Datasheets by NEC (now Renesas Electronics)

Part Number Description
UPD4104-1 4096 x 1 STATIC NMOS RAM
UPD4104-2 4096 x 1 STATIC NMOS RAM
UPD411 FULLY DECODED RANDOM ACCESS MEMORY
UPD411-1 FULLY DECODED RANDOM ACCESS MEMORY
UPD411-2 FULLY DECODED RANDOM ACCESS MEMORY

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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NEe Microcomputers, Inc. NEe p.PD4104 p.PD41 04·1 pPD41 04·2 4096 x 1 STATIC NMOS RAM DEseR IPTION The J.LPD4104 is a high performance 4K static RAM. Organized as 4096 x 1, it uses a combination of static storage cells with dynamic input/output circuitry to achieve high speed and low power in the same device. Utilizing NMOS technology, the J.LPD4104 is fully TTL compatible and operates with a single +5V ± 10% supply. FEATURES ' . FastAccessTime-200ns (J.LPD4104-2) • Very Low Stand-By Power - 28 mW Max. • Low VCC Data Retention Mode to +3 Volts. • Single +5V ±10% Supply. • Fully TTL Compatible. • Available in 18 Pin Plastic and Ceramic Dual-in-Line Packages. • '3 Performance Ranges: II jlPD4104 jlPD4104-1 jlPD4104-2 ACCESS TIME 300 ns 250 ns 200 ns RIWCYCLE 4S0 ns .