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UPD4164-3 - 65536 x 1-BIT DYNAMIC RANDOM ACCESS MEMORY

This page provides the datasheet information for the UPD4164-3, a member of the UPD4164-1 65536 x 1-BIT DYNAMIC RANDOM ACCESS MEMORY family.

Datasheet Summary

Features

  • Multiplexed address inputs permit the /lPD4164 to be packaged in the standard 16 pin dual-in-line package. The 16 pin package provides the highest system bit densities and is compatible with widely available automated handling equipment.
  • High Memory Density.
  • MUltiplexed Address Inputs.
  • Single +5V Supply.
  • On Chip Substrate Bias Generator.
  • Access Time: /lPD4164-1 - 250 ns /lPD4164-2 - 200 ns /lPD4164-3 - 150 ns.
  • Read, Write Cycle Time: /lPD41.

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Datasheet preview – UPD4164-3

Datasheet Details

Part number UPD4164-3
Manufacturer NEC
File Size 367.60 KB
Description 65536 x 1-BIT DYNAMIC RANDOM ACCESS MEMORY
Datasheet download datasheet UPD4164-3 Datasheet
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Full PDF Text Transcription

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NEe Microcomputers, Inc. 65,536 x 1 BIT DYNAMIC RANDOM ACCESS MEMORY NEe Jo&PD4164-1 ,.,. PD4164-2 J.L PD4164-3 ~rn~[m~~~illrnw DESCR I PTI ON The NEC /lPD4164 is a 65,536 words by 1 bit Dynamic N-Channel MOS RAM designed to operate from a single +5V power supply. The negative-voltage substrate bias is internally generated - its operation is both automatic and transparent. The /lPD4164 utilizes a double-poly-layer N-channel silicon gate process which provides high storage cell density, high performance and high reliability. The /lPD4164 uses a single transistor dynamic storage cell and advanced dynamic circuitry throughout, including the 512 sense amplifiers, which assures that power dissipation is minimized.
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