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UPD44324094 - 36M-BIT DDRII SRAM

Download the UPD44324094 datasheet PDF. This datasheet also covers the UPD44324084 variant, as both devices belong to the same 36m-bit ddrii sram family and are provided as variant models within a single manufacturer datasheet.

General Description

The µPD44324084 is a 4,194,304-word by 8-bit, the µPD44324094 is a 4,194,304-word by 9-bit, the µPD44324184 is a 2,097,152-word by 18-bit and the µPD44324364 is a 1,048,576-word by 36-bit synchronous double data rate static RAM fabricated with advanced CMOS technology using full CMOS six-transistor

Key Features

  • 1.8 ± 0.1 V power supply and HSTL I/O.
  • DLL circuitry for wide output data valid window and future frequency scaling.
  • Pipelined double data rate operation.
  • Common data input/output bus.
  • Four-tick burst for reduced address frequency.
  • Two input clocks (K and /K) for precise DDR timing at clock rising edges only.
  • Two output clocks (C and /C) for precise flight time and clock skew matching-clock and data delivered together to receiving d.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (UPD44324084_NEC.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

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Other Datasheets by NEC (now Renesas Electronics)

Part Number Description
UPD44324092 36M-BIT DDRII SRAM
UPD44324095 36M-BIT DDRII SRAM
UPD44324082 36M-BIT DDRII SRAM
UPD44324084 36M-BIT DDRII SRAM
UPD44324085 36M-BIT DDRII SRAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.DataSheet4U.com PRELIMINARY DATA SHEET MOS INTEGRATED CIRCUIT µPD44324084, 44324094, 44324184, 44324364 36M-BIT DDRII SRAM 4-WORD BURST OPERATION Description The µPD44324084 is a 4,194,304-word by 8-bit, the µPD44324094 is a 4,194,304-word by 9-bit, the µPD44324184 is a 2,097,152-word by 18-bit and the µPD44324364 is a 1,048,576-word by 36-bit synchronous double data rate static RAM fabricated with advanced CMOS technology using full CMOS six-transistor memory cell. The µPD44324084, µPD44324094, µPD44324184 and µPD44324364 integrate unique synchronous peripheral circuitry and a burst counter. All input registers controlled by an input clock pair (K and /K) are latched on the positive edge of K and /K.