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UPD4481361 - (UPD4481161/1181/1321/1361) 8M-BIT ZEROSB SRAM

Download the UPD4481361 datasheet PDF. This datasheet also covers the UPD4481161 variant, as both devices belong to the same (upd4481161/1181/1321/1361) 8m-bit zerosb sram family and are provided as variant models within a single manufacturer datasheet.

General Description

The µPD4481161 is a 524,288-word by 16-bit, the µPD4481181 is a 524,288-word by 18-bit, the µPD4481321 is a 262,144-word by 32-bit and the µPD4481361 is a 262,144-word by 36-bit ZEROSB static RAM fabricated with advanced CMOS technology using full CMOS six-transistor memory cell.

Key Features

  • Low voltage core supply : VDD = 3.3 ± 0.165 V (-A65, -A75, -A85, -A65Y, -A75Y, -A85Y) VDD = 2.5 ± 0.125 V (-C75, -C85, -C75Y, -C85Y).
  • Synchronous operation.
  • Operating temperature : TA = 0 to 70 °C (-A65, -A75, -A85, -C75, -C85) TA =.
  • 40 to +85 °C (-A65Y, -A75Y, -A85Y, -C75Y, -C85Y).
  • 100 percent bus utilization.
  • Internally self-timed write control.
  • Burst read / write : Interleaved burst and linear burst sequence.
  • Fully regist.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (UPD4481161_NEC.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by NEC (now Renesas Electronics)

Part Number Description
UPD4481362 (UPD4481162/1182/1322/1362) 8M-BIT ZEROSB SRAM
UPD4481321 (UPD4481161/1181/1321/1361) 8M-BIT ZEROSB SRAM
UPD4481322 (UPD4481162/1182/1322/1362) 8M-BIT ZEROSB SRAM
UPD4481161 (UPD4481161/1181/1321/1361) 8M-BIT ZEROSB SRAM
UPD4481162 (UPD4481162/1182/1322/1362) 8M-BIT ZEROSB SRAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
DATA SHEET MOS INTEGRATED CIRCUIT µPD4481161, 4481181, 4481321, 4481361 8M-BIT ZEROSBTM SRAM FLOW THROUGH OPERATION Description The µPD4481161 is a 524,288-word by 16-bit, the µPD4481181 is a 524,288-word by 18-bit, the µPD4481321 is a 262,144-word by 32-bit and the µPD4481361 is a 262,144-word by 36-bit ZEROSB static RAM fabricated with advanced CMOS technology using full CMOS six-transistor memory cell. The µPD4481161, µPD4481181, µPD4481321 and µPD4481361 are optimized to eliminate dead cycles for read to write, or write to read transitions. These ZEROSB static RAMs integrate unique synchronous peripheral circuitry, 2-bit burst counter and output buffer as well as SRAM core. All input registers are controlled by a positive edge of the single clock input (CLK).