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UPD720100A - MOS INTEGRATED CIRCUIT

General Description

are provided in the following user’s manual.

Be sure to read the manual before designing.

Key Features

  • Compliant with Universal Serial Bus Specification Revision 2.0 (Data Rate 1.5/12/480 Mbps).
  • Compliant with Open Host Controller Interface Specification for USB Rev 1.0a.
  • Compliant with Enhanced Host Controller Interface Specification for USB Rev 0.95.
  • PCI multi-function device consists of two OHCI host controller cores for full-/low-speed signaling and one EHCI host controller core for high-speed signaling.
  • Root hub with five (max. ) downstream facin.

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Part Number Description
UPD720101 USB2.0 HOST CONTROLLER
UPD720102 USB 2.0 HOST CONTROLLER
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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DATA SHEET MOS INTEGRATED CIRCUIT µPD720100A USB2.0 HOST CONTROLLER The µPD720100A complies with the Universal Serial Bus Specification Revision 2.0 and Open Host Controller Interface Specification for full-/low-speed signaling and Intel's Enhanced Host Controller Interface Specification for high-speed signaling and works up to 480 Mbps. The µPD720100A is integrated three host controller cores with PCI interface and USB2.0 transceivers into a single chip. Detailed function descriptions are provided in the following user’s manual. Be sure to read the manual before designing. µPD720100A User’s Manual: S15534E FEATURES • Compliant with Universal Serial Bus Specification Revision 2.0 (Data Rate 1.5/12/480 Mbps) • Compliant with Open Host Controller Interface Specification for USB Rev 1.