UPD72871 Description
PRELIMINARY DATA SHEET µPD72870,72871 IEEE1394 1-CHIP OHCI HOST CONTROLLER MOS INTEGRATED CIRCUIT The µPD72870, 72871 are the LSIs which integrated OHCI-Link and PHY function into a single chip. The µPD72870, 72871 ply with the P1394a draft 2.0 specifications and the OpenHCI IEEE1394 1.0 and work up to 400 Mbps. These make design so pact for PC and PC card application.
UPD72871 Key Features
- pliant with Link Layer Services as defined in 1394 Open Host Controller Interface specification release 1.0
- pliant with protocol enhancement as defined in P1394a draft 2.0
- Modular 32-bit host interface pliant to PCI Specification release 2.1
- Support PCI-Bus Power Management Interface Specification release 1.0
- Modular 32-bit host interface pliant to Card Bus Specification
- Cycle Master and Isochronous Resource Manager capable 5
- Built-in FIFOs for isochronous transmit (1024 bytes), asynchronous transmit (1024 bytes), and receive (2048 bytes)
- 32-bit CRC generation and checking for receive/transmit packets
- 4 isochronous transmit DMAs and 4 isochronous receive DMAs supported
- 32-bit DMA channels for physical memory read/write