UPD72874 Overview
PRELIMINARY DATA SHEET MOS INTEGRATED CIRCUIT µPD72874 IEEE1394 OHCI 1.1 PLIANT 3PORT PHY-LINK 1-CHIP HOST CONTROLLER The µPD72874 is the LSI that integrated OHCI-Link and PHY function into a single chip. The µPD72874 plies with the 1394 OHCI Specification 1.1 and the IEEE Std 1394a-2000 specifications, and works up to 400 Mbps. It makes design so pact for PC and PC card application.
UPD72874 Key Features
- pliant with Link Layer Services as defined in 1394 Open Host Controller Interface specification release 1.1
- pliant with Physical Layer Services as defined in IEEE Std 1394a-2000
- Provides three cable ports at 100/200/400 Mbps
- Super Low power consumption for Physical Layer
- pliant with protocol enhancement as defined in IEEE Std1394a-2000
- Modular 32-bit host interface pliant to PCI Specification release 2.2
- Supports PCI-Bus Power Management Interface Specification release 1.1
- Modular 32-bit host interface pliant to Card Bus Specification
- Cycle Master and Isochronous Resource Manager capable
- Built-in FIFOs for isochronous transmit (2048 bytes), asynchronous transmit (2048 bytes), and receive (3072 bytes)