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S7B401835M - 128Kx36 & 256Kx18 Flow-Through SRAM

This page provides the datasheet information for the S7B401835M, a member of the S7B403635M 128Kx36 & 256Kx18 Flow-Through SRAM family.

Datasheet Summary

Description

The S7B403635M and S7B401835M are 4,718,592-bit Synchronous Static Random Access Memory designed for high performance.

Features

  • VDD = 2.5V(2.3V ~ 2.7V) or 3.3V(3.1V ~ 3.5V) Power Supply.
  • VDDQ = 2.3V~2.7V I/O Power Supply (VDD=2.5V) or 2.3V~3.5V I/O Power Supply (VDD=3.3V).
  • Synchronous Operation.
  • Self-Timed Write Cycle.
  • On-Chip Address Counter and Control Registers.
  • Byte Writable Function.
  • Global Write Enable Controls a full bus-width write.
  • Power Down State via ZZ Signal.
  • LBO Pin allows a choice of either a interleaved burst or a lin- ear b.

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Datasheet preview – S7B401835M

Datasheet Details

Part number S7B401835M
Manufacturer NETSOL
File Size 485.09 KB
Description 128Kx36 & 256Kx18 Flow-Through SRAM
Datasheet download datasheet S7B401835M Datasheet
Additional preview pages of the S7B401835M datasheet.

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Full PDF Text Transcription

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S7B403635M SS77BB440013863355MM S7B401835M 128Kx36 & 256Kx18 Flow-Through SRAM 128Kx36 & 256Kx18 Flow-Through SRAM 4Mb Sync. Flow-Through SRAM Specification NETSOL RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND SPECIFICATIONS WITHOUT NOTICE. Products and specifications discussed herein are for reference purposes only. All information discussed herein is provided on an "AS IS" basis, without warranties of any kind. This document and all information discussed herein remain the sole and exclusive property of NETSOL. No license of any patent, copyright, mask work, trademark or any other intellectual property right is granted by one party to the other party under this document, by implication, estoppel or otherwise.
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