S7B803635M Overview
The S7B803635M and S7B801835M are 9,437,184-bit Synchronous Static Random Access Memory designed for high performance. It is organized as 256K(512K) words of 36(18) bits and integrates address and control registers, a 2-bit burst address counter and added some new functions for high performance applications; Write cycles are internally selftimed and synchronous.
S7B803635M Key Features
- VDD = 2.5V(2.3V ~ 2.7V) or 3.3V(3.1V ~ 3.5V) Power Supply
- VDDQ = 2.3V~2.7V I/O Power Supply (VDD=2.5V) or
- Synchronous Operation
- Self-Timed Write Cycle
- On-Chip Address Counter and Control Registers
- Byte Writable Function
- Global Write Enable Controls a full bus-width write
- Power Down State via ZZ Signal
- LBO Pin allows a choice of either a interleaved burst or a lin
- Three Chip Enables for simple depth expansion with No Data