S7K1636T2M
Description
The S7K1636T2M and S7K1618T2M are 18,874,368-bits DDR mon I/O Synchronous Pipelined Burst SRAMs.
Key Features
- 1.8V+0.1V/-0.1V Power Supply
- DLL circuitry for wide output data valid window and future
- 0.1V for 1.8V I/O
- Pipelined, double-data rate operation
- Full data coherency, providing most current data
- Synchronous pipeline read with self timed late write
- Read latency : 2 clock cycles
- Registered address, control and data input/output
- DDR(Double Data Rate) Interface on read and write ports
- Fixed 2-bit burst for both read and write operation
