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P06P03LCG - P-Channel Logic Level Enhancement

Download the P06P03LCG datasheet PDF. This datasheet also covers the P06P03LCG-NIKO variant, as both devices belong to the same p-channel logic level enhancement family and are provided as variant models within a single manufacturer datasheet.

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Note: The manufacturer provides a single datasheet file (P06P03LCG-NIKO-SEM.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number P06P03LCG
Manufacturer NIKO-SEM
File Size 307.17 KB
Description P-Channel Logic Level Enhancement
Datasheet download datasheet P06P03LCG Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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NIKO-SEM P-Channel Logic Level Enhancement Mode Field Effect Transistor P06P03LCG SOT-89 Lead-Free D PRODUCT SUMMARY V(BR)DSS -30 RDS(ON) 45m ID -4A 3 G S 1 1. GATE 2. DRAIN 3. SOURCE ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Current Power Dissipation 1 SYMBOL VDS VGS 2 LIMITS -30 ±20 -4 -3 -20 0.78 0.62 -55 to 150 UNITS V V TC = 25 °C TC = 70 °C ID IDM A TC = 25 °C TC = 70 °C PD Tj, Tstg W Operating Junction & Storage Temperature Range THERMAL RESISTANCE RATINGS THERMAL RESISTANCE Junction-to-Case Junction-to-Ambient 1 2 °C UNITS °C / W °C / W SYMBOL RθJc RθJA TYPICAL MAXIMUM 18 160 Pulse width limited by maximum junction temperature.