74AUP1G125 datasheet by NXP Semiconductors.
| Part number | 74AUP1G125 |
|---|---|
| Datasheet | 74AUP1G125_NXPSemiconductors.pdf |
| File Size | 141.24 KB |
| Manufacturer | NXP Semiconductors |
| Description | Low-power buffer/line driver |
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The 74AUP1G125 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS patible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6.
View 74AUP1G125 datasheet index
| Brand Logo | Part Number | Description | Other Manufacturers |
|---|---|---|---|
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74AUP1G125 | SINGLE BUFFER GATE | Diodes |
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74AUP1G125 | Low-power buffer/line driver | nexperia |
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74AUP1G125-Q100 | Low-power buffer/line driver | nexperia |
View all NXP Semiconductors datasheets
| Part Number | Description |
|---|---|
| 74AUP1G00 | Low-power 2-input NAND gate |
| 74AUP1G04 | Low-power inverter |
| 74AUP1G06 | Low-power inverter |
| 74AUP1G07 | Low-power buffer |
| 74AUP1G08 | Low-power 2-input AND gate |
| 74AUP1G373 | Low-power D-type transparent latch |
| 74AUP1G386 | Low-power 3-input EXCLUSIVE-OR gate |
| 74AUP1GU04 | Low-power unbuffered inverter |
| 74AUP2G07 | Low-power dual buffer |
| 74AUP2G125 | Low-power dual buffer/line driver |
