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74HCT4060 - 14-stage binary ripple counter

Download the 74HCT4060 datasheet PDF. This datasheet also covers the 74HC4060 variant, as both devices belong to the same 14-stage binary ripple counter family and are provided as variant models within a single manufacturer datasheet.

General Description

The 74HC4060; 74HCT4060 is a 14-stage ripple-carry counter/divider and oscillator with three oscillator terminals (RS, RTC and CTC), ten buffered parallel outputs (Q3 to Q9 and Q11 to Q13) and an overriding asynchronous master reset (MR).

Key Features

  • All active components on chip.
  • RC or crystal oscillator configuration.
  • Complies with JEDEC standard no. 7 A.
  • Input levels:.
  • For 74HC4060: CMOS level.
  • For 74HCT4060: TTL level.
  • ESD protection:.
  • HBM JESD22-A114F exceeds 2000 V.
  • MM JESD22-A115-A exceeds 200 V.
  • Multiple package options.
  • Specified from 40 C to +85 C and from 40 C to +125 C 3.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (74HC4060-NXPSemiconductors.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
74HCT4060 14-stage binary ripple counter nexperia
74HCT4060-Q100 14-stage binary ripple counter NXP
74HCT4060-Q100 14-stage binary ripple counter nexperia
74HCT4060BQ 14-stage binary ripple counter nexperia
74HCT4060D 14-stage binary ripple counter nexperia

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
74HC4060; 74HCT4060 14-stage binary ripple counter with oscillator Rev. 4 — 10 February 2016 Product data sheet 1. General description The 74HC4060; 74HCT4060 is a 14-stage ripple-carry counter/divider and oscillator with three oscillator terminals (RS, RTC and CTC), ten buffered parallel outputs (Q3 to Q9 and Q11 to Q13) and an overriding asynchronous master reset (MR). The oscillator configuration allows design of either RC or crystal oscillator circuits. The oscillator may be replaced by an external clock signal at input RS. In this case, keep the oscillator pins (RTC and CTC) floating. The counter advances on the HIGH-to-LOW transition of RS. A HIGH level on MR clears all counter stages and forces all outputs LOW, independent of the other input conditions.