74LVC3G07 - Triple buffer

Product Overview

NXP Semiconductors

Part number	74LVC3G07
Manufacturer	NXP Semiconductors
File Size	108.68 KB
Description	Triple buffer
Datasheet	74LVC3G07 Datasheet
Additional preview pages of the 74LVC3G07 datasheet.

The 74LVC3G07 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.

s s s s Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: x JESD8-7 (1.65 V to 1.95 V) x JESD8-5 (2.3 V to 2.7 V) x JESD8-B/JESD36 (2.7 V to 3.6 V). ESD protection: x HBM EIA/JESD22-A114-B exceeds 2000 V x MM EIA/JESD22-A115-A exceeds 200 V.
24 mA output drive (VCC = 3.0 V) CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels Inputs accept vo.

📁 Similar Datasheet

Other Datasheets by NXP Semiconductors

Published: Mar 27, 2010 |