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PCKEP14 - 2.5 V/3.3 V 1:5 differential ECL/PECL/HSTL clock driver

Datasheet Summary

Description

The PCKEP14 is a low skew 1-to-5 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer.

The ECL/PECL input signals can be either differential or single-ended (if the VBB output is used).

Features

  • s s s s s s s s s 100 ps device-to-device skew 25 ps within device skew 400 ps typical propagation delay Maximum frequency > 2 GHz (typical) Contains temperature compensation PECL and HSTL mode: VCC = 2.375 V to 3.8 V with VEE = 0 V NECL mode: VCC = 0 V with VEE =.
  • 2.375 V to.
  • 3.8 V LVDS input compatible Open input default state. Philips Semiconductors PCKEP14 www. DataSheet4U. com 2.5 V/3.3 V 1:5 differential ECL/PECL/HSTL clock driver 3. Pinning information 3.1 Pinning Q0 Q0.

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Datasheet Details

Part number PCKEP14
Manufacturer NXP Semiconductors
File Size 385.05 KB
Description 2.5 V/3.3 V 1:5 differential ECL/PECL/HSTL clock driver
Datasheet download datasheet PCKEP14 Datasheet
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Full PDF Text Transcription

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PCKEP14 Rev. 01 — 30 October 2002 www.DataSheet4U.com 2.5 V/3.3 V 1:5 differential ECL/PECL/HSTL clock driver Product data 1. Description The PCKEP14 is a low skew 1-to-5 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The ECL/PECL input signals can be either differential or single-ended (if the VBB output is used). HSTL inputs can be used when the PCKEP14 is operating under PECL conditions. The PCKEP14 specifically guarantees low output-to-output skew. Optimal design, layout, and processing minimize skew within a device, and from device to device.
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