SSTL16877
Overview
The SSTL16877 is a 14-bit SSTL_2 registered driver with differential clock inputs, designed to operate between 2.3 V and 2.7 V. VDDQ must not exceed VCC.
- Stub-series terminated logic for 2.5 V VDDQ (SSTL_2)
- Optimized for DDR (Double Data Rate) SDRAM applications
- Supports SSTL_2 signal inputs and outputs
- Flow-through architecture optimizes PCB layout
- Meets SSTL_2 class I and class II specifications
- Latch-up protection exceeds 500mA per JEDEC Std 17
- ESD protection exceeds 2000 V per MIL STD 833 Method 3015 and 200 V per Machine Model