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UM10360 - LPC17xx User manual

General Description

LPC17xx user manual revision.

“Draft” status removed.

Editorial updates and typographical corrections throughout the user manual.

Key Features

  • and a higher level of support block integration. High speed versions (LPC1769 and LPC1759) operate at up to a 120 MHz CPU frequency. Other versions operate at up to an 100 MHz CPU frequency. The ARM Cortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals. The ARM Cortex-M3 CPU also includes an internal prefetch unit that supports speculative branches. The peripheral complement of the LPC17.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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UM10360 LPC17xx User manual Rev. 01 — 4 January 2010 User manual Document information Info Keywords Content LPC1769, LPC1768, LPC1767, LPC1766, LPC1765, LPC1764, LPC1759, LPC1758, LPC1756, LPC1754, LPC1752, LPC1751, ARM, ARM Cortex-M3, 32-bit, USB, Ethernet, CAN, I2S, Microcontroller LPC17xx user manual Abstract http://www.DataSheet4U.net/ datasheet pdf - http://www.DataSheet4U.net/ NXP Semiconductors UM10360 LPC17xx user manual Revision history Rev 1 Date 20100104 Description LPC17xx user manual revision. Modifications: • • • • • • “Draft” status removed. Editorial updates and typographical corrections throughout the user manual.