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74ABT16500C Datasheet PDF

NXP Semiconductors 74ABT16500C

The 74ABT16500C is a high-performance BiCMOS Device which combines low static and dynamic power dissipation with high speed and high output drive. This device is an 18-bit universal transceiver featuring non-inverting 3-State bus compatible outputs in both send and receive directions. For A-to-B data flow, the device operates in the transparent mode when LEAB is High.
Part No. 74ABT16500C
Datasheet 74ABT16500C Download
Manufacturer
NXP Semiconductors
Description 18-bit universal bus transceiver
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74ABT16500C datasheet page 1 preview

FEATURES

● 18-bit bidirectional bus interface
● 3-State buffers
● 74ABTH16500C incorporates bus-hold data inputs which
● Output capability: +64mA/-32mA
● TTL input and output switching levels
● Live insertion/extraction permitted
● Power-up reset
● Power-up 3-State
● Negative edge-triggered clock inputs
● Latch-up protection exceeds 500mA per JEDEC Std 17
● ESD protection exceeds 2000V per MIL STD 883 Method 3015
● Flexible operation permits 18 embedded D-type latches or flip-flops to operate in clocked, transparent, or latched modes. and 200V per Machine Model eliminate the need for external pull-up resistors to hold unused inputs

DESCRIPTION

Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock (CPAB and CPBA) inputs. When LEAB is Low, the A data is latched if CPAB is held at a High or Low logic level. If LEAB is Low, the A-bus data is stored in the latch/flip-flop on the High-to-Low transition of CPAB. When OEAB is High, the outputs are active.
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