Download 74AHC74 Datasheet PDF
74AHC74 page 2
Page 2
74AHC74 page 3
Page 3

74AHC74 Description

The 74AHC/AHCT74 are high-speed Si-gate CMOS devices and are pin patible with low power Schottky TTL (LSTTL). They are specified in pliance with JEDEC standard No. The 74AHC/AHCT74 dual positive-edge triggered, D-type flip-flops with individual data (D) inputs, clock (CP) inputs, set (SD) and reset (RD) inputs;.

74AHC74 Key Features

  • Balanced propagation delays
  • Inputs accepts voltages higher than VCC
  • For AHC only: operates with CMOS input levels
  • For AHCT only: operates with TTL input levels
  • Output capability: standard
  • ICC category: flip-flops