74AHCT541 Datasheet | NXP Semiconductors

FEATURES - ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V - Balanced propagation delays - All inputs have a Schmitt-trigger action - Inputs accepts voltages higher than VCC - For AHC only: operates with CMOS input levels - For AHCT only: operates with TTL input levels - Specified from - 40 to +85 °C and - 40 to +125 °C. QUICK REFERENCE DATA Ground = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns. DESCRIPTION 74AHC541; 74AHCT541 The 74AHC/AHCT541 is a high-speed Si-gate CMOS device. The 74AHC/AHCT541 are octal non-inverting buffer/line drivers with 3-state bus patible outputs. The 3-state outputs are controlled by the output enable inputs OE0 and OE1. A HIGH on OEn causes the outputs to assume a high-impedance OFF-state. TYPICAL SYMBOL t PHL/t PLH CI CO CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; ∑ (CL × VCC2 × fo) = sum of outputs; CL = output load capacitance in p F; VCC = supply voltage in Volts. 2. The condition is VI = GND to VCC. PARAMETER propagation delay An to Yn input capacitance output capacitance power dissipation capacitance CL = 50 p F; f = 1 MHz; notes 1 and 2 CONDITIONS AHC CL = 15 p F; VCC = 5 V VI = VCC or GND 3.5 3 4.0 10 3 4.0 12 AHCT 3.5 ns p F p F p F UNIT 1999 Nov 24 Philips Semiconductors Product specification Octal buffer/line driver; 3-state FUNCTION TABLE See note 1. INPUT OE0 L L X H Note 1. H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. ORDERING INFORMATION OUTSIDE NORTH AMERICA 74AHC541D 74AHC541PW 74AHCT541D 74AHCT541PW PINNING PIN 1 2, 3, 4, 5, 6, 7, 8 and 9 10 11, 12, 13, 14, 15, 16, 17 and 18 19 20 SYMBOL OE0 A0 to A7 GND Y7 to Y0 OE1 VCC data inputs ground (0 V) OE1 L L H X An L H X X 74AHC541; 74AHCT541 OUTPUT Yn L H Z Z PACKAGES NORTH AMERICA PINS 74AHC541D 74AHC541PW DH...