74ALVC125 - Quad buffer/line driver

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NXP

Part number	74ALVC125
Manufacturer	NXP
File Size	82.04 KB
Description	Quad buffer/line driver
Datasheet	74ALVC125 Datasheet
Additional preview pages of the 74ALVC125 datasheet.

The 74ALVC125 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.

Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times.

Wide supply voltage range from 1.65 to 3.6 V.
Complies with JEDEC standard: JESD8-7 (1.65 to 1.95 V) JESD8-5 (2.3 to 2.7 V) JESD8B/JESD36 (2.7 to 3.6 V).
3.6 V tolerant inputs/outputs.
CMOS low power consumption.
Direct interface with TTL levels (2.7 to 3.6 V).
Power-down mode.
Latch-up performance exceeds 250 mA.
ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V. QUICK.

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Published: Apr 3, 2005 |