Download 74ALVCH162827 Datasheet PDF
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74ALVCH162827 Description

The 74ALVCH162827 high-performance CMOS device bines low static and dynamic power dissipation with high speed and high output drive. The 74ALVCH162827 20-bit buffers provide high performance bus interface buffering for wide data/address paths or buses carrying parity. They have NAND Output Enables (nOE1, nOE2) for maximum control flexibility.

74ALVCH162827 Key Features

  • plies with JEDEC standard no. 8-1A
  • CMOS low power consumption
  • Direct interface with TTL levels
  • Current drive ± 12 mA at 3.0 V
  • MULTIBYTETM flow-through standard pin-out architecture
  • Low inductance multiple VCC and GND pins for minimum noise