74AUP1G14 Datasheet | NXP Semiconductors

.. Low-power Schmitt-trigger inverter Rev. 01 - 20 July 2005 Product data sheet 1. General description The 74AUP1G14 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS patible TTL families. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. The 74AUP1G14 provides a single inverting Schmitt-trigger which accepts standard input signals. It is capable...