74F10 - Triple 3-input NAND gate

NXP Semiconductors

General Description

COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C N74F10N, N74F11N N74F10D, N74F11D PKG DWG # SOT27-1 SOT108-1 INPUT AND OUTPUT LOADING AND FAN OUT TABLE PINS Dna, Dnb, Dnc Qn Qn Data inputs Data output (74F10) Data output (74F11) DESCRIPTION 74F (U.L.) HIGH/LOW 1.0/1.0 50/33 50/33 LOAD VALUE HIG

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74F10 triple 3-input nand gate by NXP Semiconductors - Datasheet Preview

Datasheet Details

Part number	74F10
Manufacturer	NXP Semiconductors
File Size	72.12 KB
Description	Triple 3-input NAND gate
Datasheet	74F10 Datasheet

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Other Datasheets by NXP Semiconductors

Part Number	Description
74F109	Positive J-K positive edge-triggered flip-flops
74F11	Triple 3-input NAND gate
74F112	Dual J-K negative edge-triggered flip-flop
74F113	Dual J-K negative edge-triggered flip-flops
74F1240	Octal inverter buffer

Full PDF Text Transcription (Reference)

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INTEGRATED CIRCUITS 74F10 Triple 3-input NAND gate 74F11 Triple 3-input AND gate Product specification IC15 Data Handbook 1989 Sep 20 Philips Semiconductors Philips Semiconductors Product specification Gates 74F10 Triple 3-input NAND gate 74F11 Triple 3-input AND gate TYPE 74F10 74F11 TYPICAL PROPAGATION DELAY 3.5ns 4.2ns TYPICAL SUPPLY CURRENT (TOTAL) 3.3mA 5.3mA 14-pin plastic DIP 14-pin plastic SO 74F10, 74F11 ORDERING INFORMATION DESCRIPTION COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C N74F10N, N74F11N N74F10D, N74F11D PKG DWG # SOT27-1 SOT108-1 INPUT AND OUTPUT LOADING AND FAN OUT TABLE PINS Dna, Dnb, Dnc Qn Qn Data inputs Data output (74F10) Data output (74F11) DESCRIPTION 74F (U.L.) HIGH/LOW 1.0/1.0 50/33 50/33 LOAD VALUE HIGH/LOW 20µA/0.6mA 1.0mA/20mA 1.