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74F174 - Hex D flip-flops

General Description

The 74F174 has six edge-triggered D-type flip-flops with individual D inputs and Q outputs.

The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously.

The register is fully edge-triggered.

Key Features

  • Six edge-triggered D-type flip-flops.
  • Buffered common Clock.
  • Buffered, asynchronous Master Reset.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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INTEGRATED CIRCUITS 74F174 Hex D flip-flops Product specification IC15 Data Handbook 1988 Oct 07 Philips Semiconductors Philips Semiconductors Product specification Hex D flip-flop 74F174 FEATURES • Six edge-triggered D-type flip-flops • Buffered common Clock • Buffered, asynchronous Master Reset DESCRIPTION The 74F174 has six edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. The state of each D input, one setup time before the Low-to-High clock transition is transferred to the corresponding flip-flop’s Q output.