BUK9675-55A Datasheet | NXP Semiconductors

Description N-channel enhancement mode field-effect power transistor in a plastic package using Trench MOS™ technology, featuring very low on-state resistance. Product availability: BUK9575-55A in SOT78 (TO-220AB) BUK9675-55A in SOT404 (D 2-PAK). 2. Features s s s s Trench MOS™ technology Q101 pliant 175 °C rated Logic level patible. 3. Applications c c s Automotive and general purpose power switching: x 12 V and 24 V loads x Motors, lamps and solenoids. 4. Pinning information Table 1: Pin 1 2 3 mb Pinning - SOT78 and SOT404, simplified outline and symbol Description gate (g) mb Simplified outline Symbol drain (d) source (s) mounting base; connected to drain (d) mb d g s MBK106 MBB076 MBK116 1 2 3 SOT78 (TO-220AB) SOT404 (D2-PAK) Philips Semiconductors BUK9575-55A; BUK9675-55A Trench MOS™ logic level FET 5. Quick reference data Table 2: VDS ID Ptot Tj RDSon Quick reference data Conditions Tmb = 25 °C; VGS = 5 V Tmb = 25 °C Tj = 25 °C; VGS = 5 V; ID = 10 A Tj = 25 °C; VGS = 4.5 V; ID = 10 A Typ - - - - 64 - Max 55 20 62 175 75 81 Unit V A W °C drain-source voltage (DC) drain current (DC) total power dissipation junction temperature drain-source on-state resistance Symbol Parameter mΩ mΩ 6. Limiting values Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS VDGR VGS VGSM ID drain-source voltage (DC) drain-gate voltage (DC) gate-source voltage (DC) non-repetitive gate-source voltage drain current (DC) tp ≤ 50 µs Tmb = 25 °C; VGS = 5 V; Figure 2 and 3 Tmb = 100 °C; VGS = 5 V; Figure 2 IDM Ptot Tstg Tj IDR IDRM WDSS peak drain current total power dissipation storage temperature operating junction temperature reverse drain current (DC) pulsed reverse drain current non-repetitive avalanche energy Tmb = 25 °C Tmb = 25 °C; pulsed; tp ≤ 10 µs unclamped inductive load; ID = 12 A; VDS ≤ 55 V; VGS = 5 V; RGS = 50 Ω; starting Tmb = 25 °C Tmb = 25 °C; pulsed; tp ≤ 10 µs; Figure 3 Tmb = 25 °C;...