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CBTV24DD12A - 12-bit bus switch/multiplexer

Datasheet Summary

Description

CBTV24DD12A is designed for 1.8 V/2.5 V/3.3 V supply voltage operation and it supports Pseudo Open Drain (POD), SSTL_12, SSTL_15 or SSTL_18 signaling and CMOS select input levels.

This device is designed for operation in DDR4, DDR3 or DDR2 memory bus systems, with speeds up to 3200 MT/s.

Features

  • 2.1 Topology.
  • 12-bit bus width.
  • 1 : 2 switch/MUX topology.
  • Bidirectional operation.
  • Simple CMOS select pins (SEL0, SEL1).
  • Simple CMOS enable pin (EN) 2.2 Performance.
  • 3200 MT/s throughput.
  • 7.4 GHz bandwidth (for both single-ended and differential signals).
  • Low ON insertion loss.
  • Low return loss.
  • Low crosstalk.
  • High OFF isolation NXP Semiconductors CBTV24DD12A 12-bit bus switch/multiplexer for DDR4-DDR3-DDR2.

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Datasheet Details

Part number CBTV24DD12A
Manufacturer NXP
File Size 721.74 KB
Description 12-bit bus switch/multiplexer
Datasheet download datasheet CBTV24DD12A Datasheet
Additional preview pages of the CBTV24DD12A datasheet.

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Full PDF Text Transcription

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CBTV24DD12A 12-bit bus switch/multiplexer for DDR4-DDR3-DDR2 applications Rev. 2 — 15 November 2017 Product data sheet 1. General description CBTV24DD12A is designed for 1.8 V/2.5 V/3.3 V supply voltage operation and it supports Pseudo Open Drain (POD), SSTL_12, SSTL_15 or SSTL_18 signaling and CMOS select input levels. This device is designed for operation in DDR4, DDR3 or DDR2 memory bus systems, with speeds up to 3200 MT/s. The CBTV24DD12A has a 1 : 2 switch or 2 : 1 multiplex topology and offers a 12-bit wide bus. Each 12-bit wide A-port can be switched to one of two ports B and C, for all bits simultaneously. Each port is non-directional due to the use of FET switches, allowing a multitude of applications requiring high-bandwidth switching or multiplexing.
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