LPC3143 Datasheet PDF (low-power ARM926EJ microcontrollers)

LPC3143 - low-power ARM926EJ microcontrollers

This page provides the datasheet information for the LPC3143, a member of the LPC3141 low-power ARM926EJ microcontrollers family.

Description

The NXP LPC3141/3143 combine a 270 MHz ARM926EJ-S CPU core, High-speed USB 2.0 OTG, 192 KB SRAM, NAND flash controller, flexible external bus interface, four channel 10-bit A/D, and a myriad of serial and parallel interfaces in a single chip targeted at consumer, industrial, medical, and communicati

Features

2.1 Key features.
CPU platform.
270 MHz, 32-bit ARM926EJ-S.
16 kB D-cache and 16 kB I-cache.
Memory Management Unit (MMU).
Internal memory.
192 kB embedded SRAM.
External memory interface.
NAND flash controller with 8-bit ECC and AES decryption support (LPC3143 only).
8/16-bit Multi-Port Memory Controller (MPMC): SDRAM and SRAM.
Security.
AES decryption engine (LPC3143 only).
Secure one-time programmable memory for AES key storage and c.

Datasheet Details

Part number	LPC3143
Manufacturer	NXP Semiconductors
File Size	802.57 KB
Description	low-power ARM926EJ microcontrollers
Datasheet	LPC3143 Datasheet
Additional preview pages of the LPC3143 datasheet.

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Full PDF Text Transcription

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LPC3141/3143 Low-cost, low-power ARM926EJ microcontrollers with USB High-speed OTG, SD/MMC, and NAND flash controller Rev. 1 — 4 June 2012 Product data sheet 1. General description The NXP LPC3141/3143 combine a 270 MHz ARM926EJ-S CPU core, High-speed USB 2.0 OTG, 192 KB SRAM, NAND flash controller, flexible external bus interface, four channel 10-bit A/D, and a myriad of serial and parallel interfaces in a single chip targeted at consumer, industrial, medical, and communication markets. To optimize system power consumption, the LPC3141/3143 have multiple power domains and a very flexible Clock Generation Unit (CGU) that provides dynamic clock gating and scaling. 2. Features and benefits 2.

Published: Nov 23, 2012 |