Download MPC5746R Datasheet PDF
NXP Semiconductors
MPC5746R
MPC5746R is Microcontroller manufactured by NXP Semiconductors.
Features - This document provides electrical specifications, pin assignments, and package diagrams for the MPC5746R series of microcontroller units (MCUs). Document Number MPC5746R Rev. 7, 02/2020 - For functional characteristics, see the MPC5746R Microcontroller Reference Manual. NXP reserves the right to change the production detail specifications as may be required to permit improvements in the design of its products. Table of Contents 1 Introduction........................................................................................ 3 17.2 Flash memory Array Integrity and Margin Read 1.1 Block diagram......................................................................... 3 specifications........................................................................... 55 2 Package pinouts and signal descriptions............................................ 5 17.3 Flash memory module life specifications................................55 3 Absolute maximum ratings................................................................ 6 17.4 Data retention vs program/erase cycles...................................56 4 Electromagnetic patibility (EMC).............................................. 7 17.5 Flash memory AC timing specifications.................................57 5 Electrostatic discharge (ESD)............................................................ 7 17.6 Flash read wait state and address pipeline control settings.....58 6 Operating conditions.......................................................................... 8 18 AC specifications............................................................................... 58 7 DC electrical specifications................................................................11 18.1 Debug and calibration interface timing...................................58 8 I/O pad specification.......................................................................... 12 18.1.1 JTAG interface timing............