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MPC8572E - PowerQUICC III Integrated Processor

General Description

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Key Features

  • of the MPC8572E processor. Figure 1 shows the major functional units within the MPC8572E. 1.1 Key Features The following list provides an overview of the MPC8572E feature set:.
  • Two high-performance, 32-bit, Book E-enhanced cores that implement the Power Architecture® technology:.
  • Each core is identical to the core within the MPC8572E processor.
  • 32-Kbyte L1 instruction cache and 32-Kbyte L1 data cache with parity protection. Caches can be locked entirely or on a per-li.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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NXP Semiconductors Technical Data Document Number: MPC8572EEC Rev. 7, 03/2016 MPC8572E PowerQUICC III Integrated Processor Hardware Specifications 1 Overview This section provides a high-level overview of the features of the MPC8572E processor. Figure 1 shows the major functional units within the MPC8572E. 1.1 Key Features The following list provides an overview of the MPC8572E feature set: • Two high-performance, 32-bit, Book E-enhanced cores that implement the Power Architecture® technology: — Each core is identical to the core within the MPC8572E processor. — 32-Kbyte L1 instruction cache and 32-Kbyte L1 data cache with parity protection. Caches can be locked entirely or on a per-line basis, with separate locking for instructions and data.