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PCA9641 Datasheet 2-channel I2c-bus Master Arbiter

Manufacturer: NXP Semiconductors

Overview: PCA9641 2-channel I2C-bus master arbiter Rev. 2.1 — 27 October 2015 Product data sheet 1.

General Description

The PCA9641 is a 2-to-1 I2C master demultiplexer with an arbiter function.

It is designed for high reliability dual master I2C-bus applications where correct system operation is required, even when two I2C-bus masters issue their mands at the same time.

The arbiter will select a winner and let it work uninterrupted, and the losing master will take control of the I2C-bus after the winner has finished.

Key Features

  • 2-to-1 bidirectional master selector.
  • Channel selection via I2C-bus.
  • I2C-bus interface logic; compatible with SMBus standards.
  • 2 active LOW interrupt outputs to master controllers.
  • Active LOW reset input.
  • Software reset.
  • Four address pins allowing up to 112 different addresses.
  • Arbitration active when two masters try to take the downstream I2C-bus at the same time.
  • The winning master controls the downstream bus until it is done, as long as it is with.

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