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PCD5003A Datasheet Enhanced Pager Decoder For Pocsag

Manufacturer: NXP Semiconductors

Overview: INTEGRATED CIRCUITS DATA SHEET PCD5003A Enhanced Pager Decoder for POCSAG Product specification File under Integrated Circuits, IC17 1999 Jan 08 Philips Semiconductors Product specification Enhanced Pager Decoder for POCSAG CONTENTS 1 2 3 4 5 6 7 7.1 7.2 7.3 7.4 7.5 7.6 7.7 7.8 7.9 7.10 7.11 7.12 7.13 7.14 7.15 7.16 7.17 7.18 7.19 7.20 7.21 7.22 7.23 7.24 7.25 7.26 7.27 7.28 7.29 7.30 7.31 7.32 7.33 7.34 7.35 7.36 7.37 7.38 7.39 7.40 7.41 7.

General Description

ORDERING INFORMATION BLOCK DIAGRAM PINNING FUNCTIONAL DESCRIPTION Introduction The POCSAG paging code Error correction Operating states ON status OFF status Reset Bit rates Oscillator Input data processing Battery saving Synchronization strategy Call termination Enhanced call termination Call data output format Sync word indication Error type indication Data transfer Receiver and oscillator control External receiver control and monitoring Demodulator quick charge Battery condition input Synthesizer control Serial microcontroller interface Decoder I2C-bus access External interrupt Interrupt Masking Status/control register Pending interrupts Out-of-range Indication Real-time clock Periodic interrupt Received call delay Alert generation Alert cadence register (03H;

write) Acoustic alert Vibrator alert LED alert Warbled alert Direct alert control Alert priority Cancelling alerts 2 7.43 7.44 7.45 7.46 7.47 7.48 7.49 7.50 7.51 7.52 7.53 7.54 7.55 7.56 7.57 7.58 7.59 7.60 7.61 7.62 8 8.1 8.2 8.3 8.4 9 10 11 12 13 14 15 16 17 17.1 17.2 17.3 17.4 17.5 18 19 20 PCD5003A Automatic POCSAG alerts SRAM access RAM write address pointer (06H;

read) RAM read address pointer (08H;

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