PHB20N06T Datasheet | NXP Semiconductors

Description N-channel enhancement mode field-effect transistor in a plastic package using Trench MOS™1 technology. Product availability: PHP20N06T in SOT78 (TO-220AB) PHB20N06T in SOT404 (D 2-PAK). 2. Features s Very low on-state resistance s Fast switching. 3. Applications s Switched mode power supplies s DC to DC converters. c 4. Pinning information c Table 1: Pin 1 2 3 mb Pinning - SOT78, SOT404, simplified outline and symbol Description gate (g) mb Simplified outline Symbol drain (d) source (s) mounting base; connected to drain (d) [1] mb d g s MBK106 MBB076 MBK116 1 2 3 SOT78 (TO-220AB) [1] 1. It is not possible to make connection to pin 2 of the SOT404 package. Trench MOS is a trademark of Royal Philips Electronics. SOT404 (D2-PAK) Philips Semiconductors PHP20N06T; PHB20N06T N-channel Trench MOS™ transistor 5. Quick reference data Table 2: VDS ID Ptot Tj RDSon Quick reference data Conditions Tj = 25 to 175 Tmb = 25 °C VGS = 10 V; ID = 10 A Tj = 25 °C Tj = 175 °C 64 - 75 150 o C Symbol Parameter drain-source voltage (DC) drain current (DC) total power dissipation junction temperature drain-source on-state resistance Typ - - - - Max 55 20.3 62 175 Unit V A W °C Tmb = 25 °C; VGS = 10 V mΩ mΩ 6. Limiting values Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS VDGR VGS ID drain-source voltage (DC) drain-gate voltage (DC) gate-source voltage (DC) drain current (DC) Tmb = 25 °C; VGS = 10 V; Figure 2 and 3 Tmb = 100 °C; VGS = 10 V; Figure 2 IDM Ptot Tstg Tj IDR IDRM WDSS peak drain current total power dissipation storage temperature operating junction temperature reverse drain current (DC) pulsed reverse drain current non-repetitive avalanche energy Tmb = 25 °C Tmb = 25 °C; pulsed; tp ≤ 10 µs unclamped inductive load; ID = 11 A; VDS ≤ 55 V; VGS = 10 V; RGS = 50 Ω; starting Tmb = 25 °C Tmb = 25 °C; pulsed; tp ≤ 10 µs; Figure 3 Tmb = 25 °C; Figure 1 RGS = 20 kΩ Conditions Min - -...