PHU2N50E Datasheet | NXP Semiconductors

Philips Semiconductors Product specification Power MOS transistors Avalanche energy rated Features - Repetitive Avalanche Rated - Fast switching - Stable off-state characteristics - High thermal cycling performance - Low thermal resistance - Extremely high d V/dt capability QUICK REFERENCE DATA VDSS = 500 V ID = 2 A RDS(ON) ≤ 5 Ω GENERAL DESCRIPTION N-channel, enhancement mode field-effect power transistor, intended for use in pact Fluorescent Lamps (CFL) and low power ballasts. The PHU2N50E is patible with self oscillating and IC driven circuits, including the UBA2021 ballast controller IC. Other applications include off line switched mode power supplies and D.C. to D.C. converters. The PHU2N50E is supplied in the SOT533 (I-PAK) leaded package. PINNING PIN DESCRIPTION ------------- --------------------------------1 gate 2 3 tab drain source drain SYMBOL d SOT533 g 1 2 3 MBK915 s Top view LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER VDSS VDGR VGS ID IDM PD d V/dt Tj, Tstg Drain-source voltage Drain-gate voltage Gate-source voltage Continuous drain current Pulsed drain current Total dissipation Peak Diode Recovery voltage slope. (See fig. 19) Operating junction and storage temperature range CONDITIONS Tj = 25 ˚C to 150˚C Tj = 25 ˚C to 150˚C; RGS = 20 kΩ Tmb = 25 ˚C; VGS = 10 V Tmb = 100 ˚C; VGS = 10 V Tmb = 25 ˚C Tmb = 25 ˚C Ids 2.0 A; d I/dt = 100 A/µs; Vs = 8V; Tj < Tjmax MIN. - 55 MAX. 500 500 ± 30 2 1.3 8 50 5.2 150 UNIT V V V A A A W V/ns ˚C May 1999 Rev 1.000 Philips Semiconductors Product specification Power MOS transistors Avalanche energy rated AVALANCHE ENERGY LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER EAS Non-repetitive avalanche energy CONDITIONS...