SAA7385 Datasheet | NXP Semiconductors

INTEGRATED CIRCUITS DATA SHEET SAA7385 Error correction and host interface IC for CD-ROM (SEQUOIA) Preliminary specification File under Integrated Circuits, IC01 1996 Jun 19 Philips Semiconductors Preliminary specification Error correction and host interface IC for CD-ROM (SEQUOIA) CONTENTS 1 1.1 1.2 1.3 1.4 1.5 1.6 1.7 2 3 4 5 6 7 7.1 7.2 7.3 7.4 8 8.1 8.2 8.3 8.4 9 9.1 9.2 10 10.1 10.2 Features General 53CF94 SCSI controller 80C32 high-speed microcontroller Front-end interface logic Buffer controller Hardware third-level error correction Additional product support GENERAL DESCRIPTION QUICK REFERENCE DATA ORDERING INFORMATION BLOCK DIAGRAM PINNING FUNCTIONAL DESCRIPTION 80C32 microcontroller 53CF94 fast SCSI controller Input clock doubler Front-end MICROCONTROLLER INTERFACE Microcontroller interface status register Microcontroller interface mand register Microcontroller interrupts Microcontroller RAM organization FRONT PANEL AND MISCELLANEOUS CONTROL SIGNALS S2B UART registers Miscellaneous control registers FRONT-END Minute Second Frame (MSF) addressing and header information Front-end status and control 11 11.1 11.2 11.3 11.4 11.5 11.6 12 13 14 15 15.1 15.2 15.3 15.4 15.5 15.6 15.7 15.8 16 17 17.1 17.2 17.3 17.4 18 19 BUFFER MANAGER Front-end to buffer manager interface Microcontroller to buffer manager interface ECC to buffer manager interface SCSI to buffer manager interface Miscellaneous buffer manager considerations 53CF94 related registers FRAME BUFFER ORGANIZATION SUMMARY OF CONTROL REGISTER MAP LIMITING VALUES OPERATING CHARACTERISTICS I2S-bus timing; data mode EIAJ timing; audio mode R-W timing (see Fig.15) C-flag timing (see Fig.16) S2B interface timing SCSI interface timing Microprocessor interface DRAM interface (the SAA7385 is designed to operate with standard 70 ns DRAMs) PACKAGE OUTLINE SOLDERING Introduction Reflow soldering Wave soldering Repairing soldered joints DEFINITIONS LIFE SUPPORT APPLICATIONS 1996 Jun 19 Philips...