NXP Semiconductors SAA7388
The SAA7388 decoder is a block decoder buffer manager for high-speed CD-ROM applications that integrates real-time error correction and detection and host interface data transfer functions into a single chip. The SAA7388 has an on-chip 36-kbit memory. This memory is used as a buffer memory for error and erasure corrections.FEATURES
GENERAL DESCRIPTION
QUICK REFERENCE DATA ORDERING INFORMATION BLOCK DIAGRAM PINNING FUNCTIONALDESCRIPTION
CD-DSP interface and data input Error correction and EDC check Host interface Subcode channel Q-to-W buffering External buffer memory Sub-CPU registers Register Descriptions Sub-CPU interface Host registers CD-DSP Timings LIMITING VALUES THERMAL CHARACTERISTICS CHARACTERISTICS TIMING CHARACTERISTICS Q-to-W subcode interface timing External memory SRAM timing External memory DRAM timing Sub-CPU interface timing ATAPI host interface timing SANYO compatibility mode host interface timing Oak compatibility mode host interface timing Crystal oscillator PACKAGE OUTLINE SOLDERING DEFINITIONS LIFE SUPPORTAPPLICATIONS
SAA7388 1996 Apr 26 2 Philips Semiconductors Preliminary specification Error correction and host interface IC for CD-ROM (ELM) 1FEATURES
2GENERAL DESCRIPTION
SAA7388● CD-ROM (Mode 1) and CD-I (Mode 2 - Form 1 and Form 2) formats supported
● Real-time error detection and correction in hardware
● Suitable for octal speed, n = 8.