SSTUA32864 Datasheet PDF - NXP configurable registered buffer Specs

SSTUA32864 - configurable registered buffer

Datasheet Summary

Description

The SSTUA32864 is a 25-bit 1 : 1 or 14-bit 1 : 2 conﬁgurable registered buffer designed for 1.7 V to 2.0 V VDD operation.

All clock and data inputs are compatible with the JEDEC standard for SSTL_18.

The control inputs are LVCMOS.

Features

s s s s s s s s s s s s Conﬁgurable register supporting DDR2 Registered DIMM.

Datasheet Details

Part number	SSTUA32864
Manufacturer	NXP
File Size	134.48 KB
Description	configurable registered buffer
Datasheet	SSTUA32864 Datasheet
Additional preview pages of the SSTUA32864 datasheet.

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Full PDF Text Transcription

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www.DataSheet4U.com SSTUA32864 1.8 V conﬁgurable registered buffer for DDR2-667 RDIMM applications Rev. 01 — 12 May 2005 Product data sheet 1. General description The SSTUA32864 is a 25-bit 1 : 1 or 14-bit 1 : 2 conﬁgurable registered buffer designed for 1.7 V to 2.0 V VDD operation. All clock and data inputs are compatible with the JEDEC standard for SSTL_18. The control inputs are LVCMOS. All outputs are 1.8 V CMOS drivers that have been optimized to drive the DDR2 DIMM load. The SSTUA32864 operates from a differential clock (CK and CK). Data are registered at the crossing of CK going HIGH, and CK going LOW. The C0 input controls the pinout conﬁguration of the 1 : 2 pinout from A conﬁguration (when LOW) to B conﬁguration (when HIGH).

Published: Jan 19, 2007 |