TDA4672 Overview
Key Features
- Luminance signal delay from 20 ns to 1100 ns (minimum step 45 ns)
- Selectable luminance signal peaking with symmetrical overshoots
- Selectable 2.6 or 5 MHz peaking centre frequency and degree of peaking from -6 dB to +9 dB in 16 steps of 1 dB each
- Selectable noise reduction by coring
- Selectable 5 or 12 V sandcastle input voltage
- All controls selected via the I2C-bus
- Timing pulse generation for clamping and delay time control synchronized by sandcastle pulse
- Automatic luminance signal delay correction using a control loop
- Luminance input signal clamping with coupling capacitor
- 4.5 to +8.8 V supply voltage
