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TDA8960 - ATSC 8-VSB demodulator and decoder

Description

TDA8960 I2C-bus interface

I2C-bus interface to initialize and monitor the demodulator and Forward Error Correction (FEC) decoder.

Operation without I2C-bus control is possible (default).

“ATSC Digit

Features

  • General features.
  • One-chip Advanced Television Systems Committee (ATSC)-compliant demodulator and concatenated trellis (Viterbi)/Reed Solomon decoder with de-interleaver and de-randomizer.
  • 0.4 µm process.
  • 3.3 V device.
  • 64-lead QFP64 package.
  • Boundary scan test.
  • Output format: 8-bit wide bus.

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Datasheet preview – TDA8960

Datasheet Details

Part number TDA8960
Manufacturer NXP Semiconductors
File Size 126.47 KB
Description ATSC 8-VSB demodulator and decoder
Datasheet download datasheet TDA8960 Datasheet
Additional preview pages of the TDA8960 datasheet.

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Full PDF Text Transcription

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INTEGRATED CIRCUITS DATA SHEET TDA8960 ATSC 8-VSB demodulator and decoder Preliminary specification File under Integrated Circuits, IC02 1999 Jun 14 Philips Semiconductors Preliminary specification ATSC 8-VSB demodulator and decoder FEATURES General features • One-chip Advanced Television Systems Committee (ATSC)-compliant demodulator and concatenated trellis (Viterbi)/Reed Solomon decoder with de-interleaver and de-randomizer • 0.4 µm process • 3.3 V device • 64-lead QFP64 package • Boundary scan test • Output format: 8-bit wide bus. DOCUMENT REFERENCES 8-VSB demodulator • On-chip digital circuitry for tuner Automatic Gain Control (AGC) • Square root raised cosine filter with 11.
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