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TDA8961 - ATSC Digital Terrestrial TV demodulator/decoder

Description

plastic quad flat package; 80 leads (lead length 1.95 mm); body14 × 20 × 2.8 mm On-chip forward error correction Trellis (Viterbi) decoder TDA8961 Rate 2⁄3 (Rate 1⁄2 Ungerboeck code based) (207, 187, T = 10) Reed Solomon code Internal convolutional de-interle

Features

  • General features.
  • One-chip ATSC-compliant demodulator and concatenated trellis (Viterbi)/Reed Solomon decoder with de-interleaver and de-randomizer.
  • 0.35 µm process.
  • 3.3 V device.
  • QFP80 package.
  • Boundary Scan Test (BST).
  • 12 MHz external clock.
  • 36 MHz output for external D/A converter.
  • Parallel or serial MPEG-2 transport stream output. 8-Vestigial Side Band (VSB) demodulator.
  • Accepts 10-bit IF data sampled at 36 MHz.

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Datasheet preview – TDA8961

Datasheet Details

Part number TDA8961
Manufacturer NXP Semiconductors
File Size 157.93 KB
Description ATSC Digital Terrestrial TV demodulator/decoder
Datasheet download datasheet TDA8961 Datasheet
Additional preview pages of the TDA8961 datasheet.

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Full PDF Text Transcription

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INTEGRATED CIRCUITS DATA SHEET TDA8961 ATSC Digital Terrestrial TV demodulator/decoder Objective specification File under Integrated Circuits, IC02 2000 May 19 Philips Semiconductors Objective specification ATSC Digital Terrestrial TV demodulator/decoder FEATURES General features • One-chip ATSC-compliant demodulator and concatenated trellis (Viterbi)/Reed Solomon decoder with de-interleaver and de-randomizer • 0.35 µm process • 3.3 V device • QFP80 package • Boundary Scan Test (BST) • 12 MHz external clock • 36 MHz output for external D/A converter • Parallel or serial MPEG-2 transport stream output.
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