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TDA9141 - PAL/NTSC/SECAM decoder/sync processor

General Description

The TDA9141 is an I2C-bus controlled, alignment-free PAL/NTSC/SECAM decoder/sync processor.

The TDA9141 has been designed for use with baseband chrominance delay lines, and has a combined subcarrier frequency/comb filter enable signal for communication with a PAL comb filter.

Key Features

  • Multistandard PAL, NTSC and SECAM.
  • I2C-bus controlled.
  • I2C-bus addresses can be selected by hardware.
  • Alignment free.
  • Few external components.
  • Designed for use with baseband delay lines.
  • Integrated video filters.
  • CVBS or YC input with automatic detection.
  • CVBS output.
  • Vertical divider system.
  • Two-level sandcastle signal.
  • VA synchronization pulse (3-state).
  • HA synchronization puls.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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INTEGRATED CIRCUITS DATA SHEET TDA9141 PAL/NTSC/SECAM decoder/sync processor Product specification File under Integrated Circuits, IC02 December 1992 Philips Semiconductors Product specification PAL/NTSC/SECAM decoder/sync processor FEATURES • Multistandard PAL, NTSC and SECAM • I2C-bus controlled • I2C-bus addresses can be selected by hardware • Alignment free • Few external components • Designed for use with baseband delay lines • Integrated video filters • CVBS or YC input with automatic detection • CVBS output • Vertical divider system • Two-level sandcastle signal • VA synchronization pulse (3-state) • HA synchronization pulse or clamping pulse CLP input/output • Line-locked clock output or stand-alone I2C-bus output port • Stand-alone I2C-bus input/output port • Colour matrix and